The result of the comparison is reported in the condition codes field of the as follows (the C1 bit is not used and the C2 bit was not used in early FPUs):
C3 C2 C0 If ST(0) > source 0 0 0 If ST(0) < source 0 0 1 If ST(0) = source 1 0 0 If ST(0) ? source 1 1 1An Invalid operation exception is detected if ST(0) is empty, or if a data register specified as the source is empty, or if one of the two values is a , setting the related flag in the Status Word. The result would then be indeterminate and return C3=1, C2=1 and C0=1 as indicated above. (Values of will be treated as valid operands and yield a valid result without any exception being detected.)A Stack Fault exception is also detected if ST(0) (or a data register specified as the source) is empty, setting the related flag in the Status Word.
When either of the two values being compared is a number, a Denormal exception is detected, setting the related flag in the Status Word. The comparison would still yield a valid result.
The signed comparison means that positive values are larger than negative values, including the values of INFINITY which can be positive or negative. The lowest of all valid values would thus be -INFINITY and the greatest would be +INFINITY when used in comparisons.
When the source is a or in memory, it is first converted to the format before the comparison. Because of the rounding being performed before storing REAL4 and REAL8 values in memory, comparing ST(0) to its stored value may rarely yield the "=" result (see the latter part of the instruction for further explanation). If a computed value must be stored and used for subsequent comparisons, it should be stored as a REAL10 for maximum accuracy.
When the Status Word containing the result of the comparison is stored in AX, the C3, C2 and C0 bits can be transferred to the CPU's flag register (using the sahf instruction) as the ZF, PF and CF flags respectively. This makes it easier for branching based on the result. Following would be typical code after a comparison with a memory variable.
fcom real8_var ;compare ST(0) with the value of the real8_var variable fstsw ax ;copy the Status Word containing the result to AX fwait ;insure the previous instruction is completed sahf ;transfer the condition codes to the CPU's flag register jpe error_handler ;the comparison was indeterminate ;this condition should be verified first ;then only two of the next three conditional jumps ;should become necessary, in whatever order is preferred, ;the third jump being replaced by code to handle that case ja st0_greater ;when all flags are 0 jb st0_lower ;only the C0 bit (CF flag) would be set if no error jz both_equal ;only the C3 bit (ZF flag) would be set if no error
FCOMP (Compare ST(0) to a floating point value and POP ST(0))
The popped value is not stored anywhere. The FPU simply modifies the tag of the current TOP register to "empty" in the , and increments the TOP field in the .
An example of using the FCOMP instruction would be when a temporary value has been stored as a REAL10 for later use in comparisons. Memory values in that format are not available for direct comparison like the REAL4 and REAL8 values and must be loaded to the FPU. If a comparison between that temporary value and the value in ST(2) would be required,
fld temp_var ;load the REAL10 value of temp_var ;temp_var now located in ST(0) fcomp st(3) ;compare it to the value in ST(3) ;which was formerly ST(2) before loading temp_var ;and then discard the temp_var value from the FPU and ;re-establish the previous order of values in the FPU registers fstsw ax ;retrieve result and proceed as required ;(see the FCOM example code)
FCOMPP (Compare ST(0) to ST(1) and POP both registers)
- ST(0) can only be compared to ST(1) and
- both ST(0) and ST(1) are popped after the comparison is completed.
This instruction is used when both the values in ST(0) and in ST(1) would no longer be needed in FPU registers for further computation.
An example of using the FCOMPP instruction would be when a recursive computation is performed until the difference between the current value and the previous one must meet a given criteria. The following typical code assumes global variables for the criteria and for the temporary storage of previous values. It also assumes that the current value is in ST(0).
.data criteria dt 3.3333e-15 ;could be initialized or set by the program temp_var dt ? ;could be initialized or set by the program .code fld temp_var ;load previous value ;=> ST(0)=previous value, ST(1)=current value fsub st,st(1) ;difference with current value fabs ;get the absolute value of the difference fld criteria ;load the criteria ;=> ST(0)=criteria, ST(1)=abs(difference), ST(2)=current value fcompp ;compare the criteria to the difference ;and discard both values from the FPU ;=> ST(0)=current value fstsw ax ;retrieve comparison result in the AX register fwait ;insure the previous instruction is completed sahf ;transfer the condition codes to the CPU's flag register ;In this type of code, the computed values should already have been verified ;to be valid numbers. Their difference should thus be a valid number, as well ;as the criteria. Therefore no need to check for an indeterminate comparison. ja criteria_greater ;criteria was ST(0) for comparison jb criteria_lower jz criteria_equal
FUCOM (Unordered Compare ST(0) to a floating point value)
This specialized instruction could be of use for advanced programming only if SNANs and QNANs features were implemented. A similar advanced instruction is not available for comparing ST(0) with integer values.
FUCOMP (Unordered Compare ST(0) to a floating point value and POP ST(0))
This specialized instruction could be of use for advanced programming only if SNANs and QNANs features were implemented. A similar advanced instruction is not available for comparing ST(0) with integer values.
FUCOMPP (Unordered Compare ST(0) to ST(1) and POP both registers)
This specialized instruction could be of use for advanced programming only if SNANs and QNANs features were implemented.
FCOMI (Compare ST(0) to ST(i) and set CPU flags)
Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used). The encoding is provided to facilitate hard-coding of this instruction if it is not supported by the assembler.This instruction compares the content of ST(0) and ST(i), and then sets the ZF, PF and CF flags of the CPU's flag register according to the result of the comparison as follows:Syntax: fcom (no operand) fcom Src Exception flags: Stack Fault, Invalid operation, Denormalized value2The condition codes field of the Status Word is not modified.
An Invalid operation exception is detected if either register is empty or contains a , setting the related flag in the . The result would be indeterminate and return ZF=1, PF=1 and CF=1 as indicated above. (Values of will be treated as valid operands and yield a valid result without any exception being detected.)
A Stack Fault exception is also detected if ST(0) (or the data register specified as the source) is empty, setting the related flag in the Status Word.
Compared to the instruction, FCOMI eliminates the need to transfer the Status Word to AX, and then transfer the condition codes from AH to the CPU's flag register prior to conditional jumps. However, FCOMI does not allow comparisons between ST(0) and values in memory.
The following example hard-codes the instruction for comparing ST(0) to ST(2).
Syntax: fcom (no operand) fcom Src Exception flags: Stack Fault, Invalid operation, Denormalized value3If these newer instructions are not supported by the assembler, macros could be prepared to hard-code them as above. An example of such a macro would be as follows:Syntax: fcom (no operand) fcom Src Exception flags: Stack Fault, Invalid operation, Denormalized value4which could then be used in the above example code as follows:Syntax: fcom (no operand) fcom Src Exception flags: Stack Fault, Invalid operation, Denormalized value5
FCOMIP (Compare ST(0) to ST(i) and set CPU flags and Pop ST(0))
Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used). The encoding is provided to facilitate hard-coding of this instruction if it is not supported by the assembler.This instruction is the same as the FCOMI instruction with the only difference that the top data register is popped after the comparison is completed. This instruction is used when the value in ST(0) would no longer be needed for further computation after the comparison has been performed. See the FCOMI instruction for other details.
FUCOMI (Unordered Compare ST(0) to ST(i) and set CPU flags)
Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used). The encoding is provided to facilitate hard-coding of this instruction if it is not supported by the assembler.This instruction is the same as the FCOMI instruction with the only difference that the Invalid operation exception will be detected only if one or both operands are an SNAN type of NAN. The QNANs would not result in an invalid operation but would still set the ZF, PF and CF flags of the CPU's flag register (undefined comparison). See the FCOMI instruction for other details.
FUCOMIP (Unordered Compare ST(0) to ST(i) and set CPU flags and Pop ST(0))
Note: This instruction is valid only for the Pentium Pro and subsequent processors. It may not be supported by some assemblers (for MASM, the .686 directive must be used). The encoding is provided to facilitate hard-coding of this instruction if it is not supported by the assembler.This instruction is the same as the FUCOMI instruction with the only difference that the top data register is popped after the comparison is completed. This instruction is used when the value in ST(0) would no longer be needed for further computation after the comparison has been performed. See the FUCOMI instruction for other details.
FICOM (Compare ST(0) to an integer in memory)
Note that ST(0) cannot be compared to a 64-bit QWORD integer in memory. If that becomes necessary, the QWORD integer value must first be loaded to the FPU and the FCOM or instruction used.The values of ST(0) and of the source are not modified by this instruction.
The result of the comparison is reported in the condition codes field of the as follows (the C1 bit is not used and the C2 bit was not used in early FPUs):
C3 C2 C0 If ST(0) > source 0 0 0 If ST(0) < source 0 0 1 If ST(0) = source 1 0 0 If ST(0) ? source 1 1 1An Invalid operation exception is detected if ST(0) is empty, or if its value is a , setting the related flag in the Status Word. The result would be indeterminate and return C3=1, C2=1 and C0=1 as indicated above. (Values of in ST(0) will be treated as valid operands and yield a valid result without any exception being detected.)A Stack Fault exception is also detected if ST(0) is empty, setting the related flag in the Status Word.
When the value in ST(0) is a number, a Denormal exception is detected, setting the related flag in the Status Word. The comparison would still yield a valid result.
The signed comparison means that positive values are larger than negative values, including the values of INFINITY which can be positive or negative. The lowest of all valid values in ST(0) would thus be -INFINITY and the greatest would be +INFINITY when used in comparisons.
When the Status Word containing the result of the comparison is stored in AX, the C3, C2 and C0 bits can be transferred to the CPU's flag register (using the sahf instruction) as the ZF, PF and CF flags respectively. This makes it easier for branching based on the result. Following would be typical code after a comparison with an integer in memory. This example makes use of the possibility of pushing immediate values on the stack.
C3 C2 C0 If ST(0) > source 0 0 0 If ST(0) < source 0 0 1 If ST(0) = source 1 0 0 If ST(0) ? source 1 1 11
FICOMP (Compare ST(0) to an integer in memory and POP ST(0))
The popped value is not stored anywhere. The FPU simply modifies the tag of the current TOP register to "empty" in the , and increments the TOP field in the .
FTST (Test ST(0) by comparing it to +0.0)
The result of the comparison is reported in the condition codes field of the as follows (the C1 bit is not used and the C2 bit was not used in early FPUs):
C3 C2 C0 If ST(0) > source 0 0 0 If ST(0) < source 0 0 1 If ST(0) = source 1 0 0 If ST(0) ? source 1 1 14An Invalid operation exception is detected if ST(0) is empty, or if its value is a , setting the related flag in the Status Word. The result would be indeterminate and return C3=1, C2=1 and C0=1 as indicated above. (Values of will be treated as valid operands and yield a valid result without any exception being detected.)A Stack Fault exception is also detected if ST(0) is empty, setting the related flag in the Status Word.
When the value of ST(0) is a number, a Denormal exception is detected, setting the related flag in the Status Word. The comparison would still yield a valid result.
A value of -0.0 in ST(0)would be treated as equal to a +0.0 value.
This instruction is used primarily to determine if the value in ST(0) is positive, or negative, or equal to zero, if it is a valid floating point value. For example, such a test should be performed before attempting to compute the logarithm of a number or extract its square root. Following would be typical code with this instruction.
C3 C2 C0 If ST(0) > source 0 0 0 If ST(0) < source 0 0 1 If ST(0) = source 1 0 0 If ST(0) ? source 1 1 15
FXAM (Examine the content of ST(0))
The following example code would examine the content of a temporary variable to determine the action required by the ensuing code according to the result. The condition codes are transferred to the CPU's flag register for the main conditional jumps (C3=ZF, C2=PF, C0=CF). The action required for each case will then depend on the purpose of the examination and is left blank. In most cases, only a few of the cases may require special action.